This invention relates generally to mixed signal processing and more particularly to Delta Sigma modulators.
As is known, Delta Sigma modulators are used in a variety of applications that may be constructed in a variety of ways. For example, a Delta Sigma modulator may be used in analog to digital converters, digital to analog converters, local oscillators, et cetera. The construction may be 1st order, multi-order (typically 2 to 8), mash configuration, single-bit output and/or multi-bit output.
In general, a Delta Sigma modulator includes an integration section and a quantizer. The integration section samples an input signal (e.g., analog or digital) at an over sampling rate (e.g., 8 to 256 times the Nyquist rate) and then integrates the samples based on the order of integration (i.e., the number of integrators). The integrated signals are then quantized by the quantizer at the over sampling rate. The resulting quantized signal is a digital representation of the input signal.
The digital representation of the input signal may be filtered via a decimation filter to produce a digital value for analog to digital conversion. Alternatively, the digital representation of the input signal may be low pass filtered to produce an analog signal for digital to analog conversion.
As is further known, when the quantizer produces a multi-bit output, the quantization noise is reduced with respect to a single-bit quantized output. However, a multi-bit Delta Sigma modulator requires a multi-bit feedback path that includes one or more digital to analog converters (the number depends on the order of the Delta Sigma modulator) to provide an analog representation of the quantized signal to the integration section. Since an ideal multi-bit DAC does not exist, non-linearities are introduced into the Delta Sigma modulator via the feedback digital to analog converter(s). Such non-linearities adversely affect the performance of the Delta Sigma modulator by degrading dynamic range and signal to noise ratio.
Therefore, a need exists for a compensation method and apparatus that minimizes the adverse affects of non-linearities introduced by feedback DACs (digital to analog converters) in a Delta Sigma modulator.